Schottky-Barrier Diode Array Fabrication With Self-Aligned Ni Silicidation For Low Power Phase-Change Memory Application

A high density design of Schottky-barrier diode array with self-aligned nickel-silicidation under 40nm technology node fabricated on epitaxial layer for low power phase-change memory application is proposed. According to N-type doping profile from simulation, large ON/OFF current ratio, the lower barrier height of Phi(B) and series resistance R-S are all determined by the dosage of buried N+ layer, epitaxial layer thickness. In addition, the temperature effect of the Schottky diode array is demonstrated by I-V electrical characteristics. From the optimal silicon-based results, a 9F(2) 16 x 16 diode array with the ideality factor of 1.21 similar to 1.40 shows a drive current density of similar to 14.9 mA/mu m(2), a J(on)/J(off) ratio of similar to 5.17x10(3), and crosstalk immunity. Furthermore, this calibrated physical model makes it possible to predict and improve the performance of accessing device array next generation for non-volatile memory application.