OFDM系统中FFT处理器芯片的设计

Microelectronics(2010)

Cited 23|Views6
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Abstract
针对OFDM系统中FFT处理器的设计要求,选用4442混合基,按频率提取算法,设计128点高效FFT处理器。采用改进的基-4算法、乒乓RAM设计思想及流水线结构,使FFT处理器各个部分时序紧密配合,硬件和功耗得到优化。该ASIC采用SMIC CMOS 0.18 μm 1P5M工艺实现,结果满足时序和制造工艺要求,达到以下指标:工作频率66 MHz,芯片面积5.2075 mm2,功耗354.728 mW。
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Key words
Fast Fourier transform,OFDM,Butterfly process unit,Address generator
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