Use of Redundant Arithmetic on Architecture and Design of a High Performance DCT Macro-bloc Generator

In view of the performance obtained through the use of redundant operators, it would appear interesting to generalize the redundant arithmetic in high compu- tational digital circuits. To illustrate this, this paper presents the implementation of a high performance Discrete Cosine Transform (DCT) macrogenerator. The proposed architectures are applicable to the real- time processing of image compression standards (MPEG, HDTV...)