Electronics and readout of a large area silicon detector for LHC

The purpose of the RD2 project is to evaluate the feasibility of a silicon tracker and/or preshower detector for LHC. Irradiation studies with doses equivalent to those expected at LHC have been performed to determine the behavior of operational parameters such as leakage current, depletion voltage and charge collection during the life of the detector. The development of fast, dense, low power and low cost signal processing electronics is one of the major activities of the collaboration. We describe the first fully functional integrated analog memory chip with asynchronous read and write operations and level 1 trigger capture capabilities. A complete test beam system using this analog memory chip at 66 MHz has been successfully operated with RD2 prototype silicon detectors during various test runs. The flexibility of the electronics and readout have allowed us to easily interface our set-up to other data acquistion systems. Mechanical studies are in progress to design a silicon tracking detector with several million channels that may be operated at low (0–10°C) temperature, while maintaining the required geometrical precision. Prototype readout boards for such a detector are being developed and simulation studies are being performed to optimize the readout architecture.