A High Resolution Metastability-Independent Two-Step Gated Ring Oscillator Tdc With Enhanced Noise Shaping

This paper presents a high resolution two-step gated-ring oscillator (TSGRO) time-to-digital converter (TDC) in an all digital phase-locked loop (ADPLL). TSGRO-TDC consists of a coarse step and a fine step gated-ring oscillator (GRO) TDC to achieve a high resolution. An edge aligner is used in the fine step GRO-TDC to enhance a first-order noise shaping property. A meta-stability free selection logic (MSFSL) is proposed in this paper which achieves low power and small area. In 0.13 mu m CMOS process, TSGRO-TDC has a 3ps raw resolution and first-order noise shaping.