Temperature-independence-point properties for 0.1 mu m-scale pocket-implant technologies and the impact on circuit design

ASPDAC: Asia and South Pacific Design Automation Conference(2003)

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Abstract
The temperature-independence point (TIP) of the drain current for MOS transistors in a 0.1mum-scale pocket-implant technology is gate-length (L-g) dependent and has different magnitudes for n-MOSFET and p-MOSFET. Circuits such as ring-oscillators have a TIP, lying between the values for n- and p-MOSFET. The circuit TIP is close to the n-MOSFET TIP for long Lg and gets closer to the p-MOSFET TIP for short L-g. The reason is the different temperature dependence of electron and hole mobility as a function of L-g. Due to the high field effect, oscillation periods of ring-oscillators with short L-g hardly improve, when the supply voltage is raised beyond the TIP. Therefore, an advantageous supply-voltage (V-DD) choice for pocket-implant technologies is near the TIP of circuits, allowing a favorable combination of short switching delay and minimized temperature dependence. By designing the V-th,V-p closer to V-th,V-n, not only the low power dissipation, due to the reduction of the TIP, but also the suppressed TIP fluctuation can be realized.
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Key words
CMOS integrated circuits,carrier mobility,integrated circuit technology,ion implantation,low-power electronics,0.1 micron,MOSFET drain current,electron mobility,high field effect,hole mobility,low power dissipation,n-MOSFET,p-MOSFET,pocket-implant technology,ring-oscillators,short switching delay,supply-voltage,temperature-independence-point properties,
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