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全局自动图像配准算法加速器

Li Baofeng,Tian Baohua,Zhang Xiaoming,Zheng Mingling

Journal of Computer-Aided Design & Computer Graphics（2012）

Cited 1|Views17
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Abstract
由于全局自动图像配准算法计算和存储复杂度高,不易实现实时处理,为此提出一种改进的基于块的全局自动图像配准算法加速器结构(BWAGIR II).该结构采用双组多体存储结构及优化的数据放置策略,支持在单个时钟周期内同时读取4×4插值窗口中的16个像素值;并采用定浮混合计算逻辑,以支持定点和浮点操作数的混合计算.FPGA实现结果表明,采用文中结构对5个BWAGIR II处理单元的数据吞吐率超过258×106像素?s.
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Key words
image registration,parallel processing,accelerator,FPGA
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