A low-cost and high efficiency entropy encoder architecture for H.264/AVC

2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC)(2012)

引用 3|浏览12
暂无评分
摘要
This paper addresses the advancements on entropy encoding in efficient platforms for video compression. Advances have been added to the state-of-the-art video encoding standard - H.264/AVC [1] at the expense of increased complexity. This work contributes with dedicated hardware for applications which have restrictions in processing capacity and limited energy budget (video-cameras, smartphones and other embedded systems) to encode high definition videos with multiple entropy encoding (EE) features for all H.264 profiles. Our work introduce and implement a low-cost and high efficiency EE architecture for H.264/AVC, providing a real-time full high definition (HD1080) resolution video coding. The architecture has the unique feature of hardwiring all the three entropy encoders present in H.264/AVC - Exp. Golomb (EXPG), CAVLC, CABAC. It was described in VHDL and synthesized to Xilinx FPGA. The results of the proposed CAVLC architecture reached 60Hz at HD1080 compared to 30Hz by state-of-the-art [4]. Our architecture also provides CABAC encoding in hardware with 3x less area compared to state-of-the-art [6].
更多
查看译文
关键词
FPGA,CABAC,CAVLC,H.264/AVC,video compression
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要