Flip-Chip Packaging for Nanoscale Silicon Logic Devices: Challenges and Opportunities

Nanopackaging(2018)

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摘要
After decades of following the roadmap laid out by Moore’s law [1] , silicon features have reached the nanoscale, which is below 100 nm in dimension, as illustrated in Fig. 22.1 . The first logic products with 90-nm transistors, using the traditional silicon dioxide insulator and polysilicon gate, went into volume production in 2003. More recently in 2007, 45-nm devices using a revolutionary high-k metal gate transistor technology have been introduced [2 , 3] . These nanoscale devices enable higher performance circuits, which in turn drive advanced features in their packaging. These devices can significantly lower the power consumption of high-performance logic products creating new applications in the fast-growing ultramobile market (Fig. 22.2 ) and thus requiring packaging to support the demands of these form factors. This chapter will discuss the challenges and opportunities in flip chip packaging for these nanoscale devices. In the early days of the semiconductor industry, microelectronics packaging primarily provided space transformation, and structural and environmental protection of the small but expensive integrated circuit (IC) devices so that they could be connected to relatively large electronic system boards. The role of microelectronics packaging has continued to expand over the past few decades to include electrical and thermal performance management, as well as enabling system miniaturization. Containing the cost of packaging and meeting environmental regulations have been critical constraints during this evolution. Electronics packaging technology has made significant advances over the years. To effectively describe these advances and future challenges, we will primarily focus on logic ICs in computing systems such as mobile PCs (personal computers), desktop PCs, and servers, in this chapter. That is because such systems generally need advanced packaging, driven mainly by the high-performance levels of the microprocessors within them. We will also use examples of ultramobile systems typified by the cell phone to describe some of the form-factor-driven packaging technology.
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