Electromigration-aware routing for 3D ICs with stress-aware EM modeling
ICCAD(2012)
Abstract
Electromigration (EM) has become a key reliability concern for nanometer IC designs. For 3D ICs, higher current density/temperature and TSV-induced thermal mechanical stress further exacerbate the EM issue compared to 2D ICs. In this paper, we analyze the root causes of EM for 3D IC signal nets, with consideration of current density, temperature, and TSV-induced thermal mechanical stress. We develop compact EM models for both DC and AC signal nets using detailed finite-element-analysis (FEA) and build EM library for mean-time-to-failure (MTTF). For AC signal nets, we convert AC current into equivalent DC current and model EM with it. One unique property of EM in 3D ICs is that, depending on the current direction, TSV-induced stress may degrade or improve the MTTF, thus routing plays an important role for EM mitigation. We suggest EM-aware routing algorithms for 3D ICs for the first time to our best knowledge, guided by our stress-aware EM modeling. Experimental result shows that our proposed approach improves EM-robustness of 3D IC benchmarks significantly, e.g., 66.4% less EM-violated grids with little sacrifice of conventional routing objectives.
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Key words
em mitigation,electromigration,temperature stress,model em,integrated circuit reliability,dc signal nets,integrated circuit modelling,stress-aware em modeling,finite-element-analysis,tsv-induced thermal mechanical stress,thermal stresses,ac signal,electromigration-aware routing,fea,3d ic signal nets,em library,three-dimensional integrated circuits,compact em models,ac signal nets,em issue,compact em model,failure analysis,current density,nanometer ic designs,em-aware routing algorithms,integrated circuit design,finite element analysis,reliability,current direction,mean-time-to-failure,em-violated grids,mttf,nanoelectronics,2d ic,metals,through silicon via,finite element method,3d ic,stress,routing,static timing analysis
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