An architecture for a space-based reconfigurable protocol chip

In this work, we present a framework for a spacebased reconfigurable protocol chip. We identify key input stimuli that would promote reconfiguration. Utilizing the identified stimuli, we then present a basic architecture that enables configuration. Significance is placed on the protocol aspect and in particular, detection and reconfiguration of a link layer protocol. We present a sensing mechanism that detects when link layer reconfiguration is required and finally present results on the likelihood of false reconfiguration for our link layer protocol sensing technique. In addition to the sensing aspect, fault tolerance in addressed.