Automation Of The Ic Layout Of Continuous-Time Transconductance Capacitor Filters

To exploit the increased circuit density available in current technologies for continuous-time (c-t) systems, it is proposed to extend the range of analogue design automation to the larger c-t subsystems, specifically filters, commonly found in communications, mass storage devices and other interfaces to real-world signals. The synthesis is based on LC ladder simulation using only transconductances and grounded capacitors (TGC). The method retains many of the characteristics of digital design automation and therefore allows a direct mapping of these techniques. The TGC approach is shown to require a minimum of component types which are ideally suited to integration in MOS, bipolar or GaAs technologies. A simple example for the automation of c-t filter designs as well as results of CMOS c-t filters are included to demonstrate the viability of this approach. Related and equally important areas addressed are tuning, compensation for parasitics and scaling.