Comparing VHDL and VHDL-AMS for Modelling and Simulation of Power Converters with Digital Control

Digital controllers are spreading among switching power converters. One of the new problems that arise is modelling and simulation of the power converter with the controller altogether. In the case of DSP controllers, which make use of C code, there are some available mixed-signal simulation tools. However, in the case of VHDL description of the controllers, new solutions are required. This work presents VHDL and VHDL-AMS models for both the power converter and A/D converters. Using these models, a closed-loop simulation is possible, therefore enabling an exhaustive test of the controller. The generation of the models is explained and then both methods are compared, presenting its advantages and drawbacks. They are also validated with experimental results.