Void Growth Behavior in ULSI Cu Interconnections by Grain-Boundary Diffusion Simulation

The behavior of void growth in ultra-large-scale integration Cu interconnections has been investigated by grain-boundary diffusion simulation to confirm the effectiveness of the high-pressure reflow process for suppressing stress-induced voiding. Void growth was simulated by combining stress analysis and atomic flux analysis. The former was calculated by the finite-element method (FEM), and the latter was calculated by an unusual FEM in which grain boundaries were defined as elements. From the results of void growth analysis, we found that voids tend to disappear during the isochronal annealing step and that the void shrinkage rate can be increased by two to three times by applying pressure of 150 MPa compared with normal-pressure annealing. From the simulation results, it can be conjectured that the high-pressure reflow process is effective for eliminating voids in via holes of Cu interconnections.