高速数字信号处理中的双缓冲ZBT Sram控制器设计
Transactions of Shenyang Ligong University(2008)
Abstract
针对高速数字信号处理数据源的特点,提出了一种基于FPGA的片外ZBT Sram的双缓冲方案.该控制器提供FPGA与两片ZBT Sram之间的接口,通过乒乓操作实现了对高速AD数据流的无缝缓冲处理,为高速数字信号处理提供了符合流水线算法要求的输入数据.
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Key words
ping-pong operation,ZBT(zero bus toggle) Sram controller,pipelined design
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