Error patterns in MLC NAND flash memory: measurement, characterization, and analysis
DATE(2012)
摘要
As NAND flash memory manufacturers scale down to smaller process technology nodes and store more bits per cell, reliability and endurance of flash memory reduce. Wear-leveling and error correction coding can improve both reliability and endurance, but finding effective algorithms requires a strong understanding of flash memory error patterns. To enable such understanding, we have designed and implemented a framework for fast and accurate characterization of flash memory throughout its lifetime. This paper examines the complex flash errors that occur at 30-40nm flash technologies. We demonstrate distinct error patterns, such as cycle-dependency, location-dependency and value-dependency, for various types of flash operations. We analyze the discovered error patterns and explain why they exist from a circuit and device standpoint. Our hope is that the understanding developed from this characterization serves as a building block for new error tolerance algorithms for flash memory.
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关键词
distinct error pattern,flash technology,error pattern,flash operation,nand flash memory manufacturer,flash memory error pattern,mlc nand flash memory,error correction coding,complex flash error,new error tolerance algorithm,flash memory,logic gate,programming,reliability,interference,error correction,error correction code,logic gates,electric field,threshold voltage,wear,electric fields
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