A 0.18-/spl mu/m CMOS 10-Gb/s Dual-Mode 10-PAM Serial Link Transceiver

IEEE Trans. on Circuits and Systems(2013)

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摘要
A 0.18-μm CMOS 10-Gb/s serial link transceiver is presented. For the power-efficiency, the transceiver employs a dual-mode 10-level pulse amplitude modulation (10-PAM) technique enabling to transmit 4-bit per symbol. Since the operating frequency of the internal circuits is reduced by 4, the power dissipation of the transceiver is much reduced. In addition, compared with a standard 16-PAM techniqu...
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关键词
Logic gates,Transceivers,CMOS integrated circuits,Power dissipation,Standards,Transmitters,Receivers
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