A low power fully integrated analog baseband circuit with variable bandwidth for 802.11 a/b/g WLAN

Microwave Conference Proceedings, 2005. APMC 2005. Asia-Pacific Conference Proceedings(2005)

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Abstract
This paper presents experimental results of an analog baseband circuit with variable bandwidth for WLAN direct conversion receiver in UMC 0.18μm CMOS process. A seventh order Chebyshev lowpass filter with triple bandwidth is used in the analog baseband circuit. The bandwidth is selectable from 7.56MHz, 19.5MHz, or 26.5MHz. The circuit adopts the servo loop for dc offset cancellation. It also has a gain range from 20dB to 60 dB with 10 dB steps while only dissipating 22.248mW. In addition, an automatic frequency tuning loop (ATL) is reported to achieve the bandwidth accuracy of the filter.
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802.11 wlan standard,cmos analogue integrated circuits,cmos process,variable bandwidth,wlan,dc offset cancellation,chebyshev,tuning.,low power integrated analog baseband circuit,26.5 mhz,wlan direct conversion receiver,20 to 60 db,seventh order chebyshev lowpass filter,low-power electronics,low-pass filters,7.56 mhz,22.248 mw,automatic frequency tuning loop,circuit tuning,19.5 mhz,servo loop,receivers,tuning,wireless lan,lowpass filter,chebyshev filters,0.18 micron,direct conversion receiver,low power electronics,low pass filters
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