Correlation Method Of Circuit-Performance And Technology Fluctuations For Improved Design Reliability

D Miyawaki,S Matsumoto,Hj Mattausch, S Ooshiro, M Suetake, M Miura-Mattausch, S Kumashiro, T Yamaguchi,K Yamashita,N Nakayama

ASP-DAC01: Asia and South Pacific Design Automation Conference 2001 Yokohama Japan(2001)

引用 3|浏览4
暂无评分
摘要
We propose a method of correlating circuit performance with technology fluctuations during the circuit-design phase. The method employs test circuits sensitive for technology fluctuations and a circuit simulation model which enables to interpret the correlation. We validate our proposal with a cascode-current-source test circuit and the drift-diffusion MOSFET model HiSIM. The chosen test circuit allows to separate intra-chip and inter-chip technology fluctuations and to correlate these fluctuations with circuit-performance fluctuations. One important result is that intra-chip fluctuations increase faster than inter-chip fluctuations with decreasing gate length. Quantitative modeling with HiSIM reveals random fluctuation of the effective gate length as the most likely origin for these findings.
更多
查看译文
关键词
correlation methods,fluctuations,integrated circuit design,integrated circuit modelling,integrated circuit reliability,HiSIM,cascode-current-source test circuit,circuit simulation model,circuit-design phase,circuit-performance fluctuations,correlation method,design reliability improvement,drift-diffusion MOSFET model,effective gate length fluctuations,inter-chip technology fluctuations,intra-chip technology fluctuations,random fluctuation,technology fluctuations,
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要