Integration of SiO2 Aerogel as ultra low k dielectric (ULK) into Copper Damascene Interconnects for RF Devices

On-chip integration of passive devices like inductors, capacitors, resistors, transmission lines etc in the BEOL of advanced RF-CMOS, BiCMOS and Bipolar devices is becoming more and more attractive in order to reduce the total number of components which are required for wireless products like e.g. mobile phones. In order to minimise power consumption of the chips and to optimise the performance of passive devices, effective reduction of parasitic capacitances (e.g. parasitic coupling with the substrate or with surrounding metal lines, plates or pads) is a key challenge. Replacing standard SiO2 by low-k or ULK dielectrics might be an attractive and effective approach to achieve the required reduction of parasitics. In the performed feasibility study, an ultra low-k (ULK) mesoporous SiO2 aerogel dielectric (SAGel, k=2.2) has been successfully integrated in selected levels of a Cu multilevel metallization of RF demonstrators. According to the ITRS-roadmap (1), a typical 90 nm CMOS technology will have a hierarchical architecture with at least four narrow spaced metal levels with minimum dimensions, at least two levels with moderate dimensions and at least one fat metal level with even larger lateral dimensions. Especially for RF applications, there might even be more than one level with such relaxed feature sizes, which house passive components like inductors. As our study is finally evaluating the impact of ULK integration on inductor performance, we used an architecture with relaxed geometries typical for such upper levels, although they are called metal 1 and metal 2 in this report, respectively. As a model demonstrator, a 2 LM Cu damascene metallization with a 20 nH spiral inductor in the top level (M2) is used. Ultra low k (ULK) Dielectric - Deposition Process and Properties SiO2-Aerogel (SAGel) is derived from a conventional sol-gel-process starting from the precursor TEOS (Tetraethylorthosilicate) mixed with solvent, water and catalyst. The mixture is spun on the wafer and dried after gelation at normal pressure. On this way, silica films with high porosity (~50%) and mean pore radius of 3.4nm are obtained. The process flow and the properties have been already described in detail in former publications (2, 3). Some selected properties of SAGel are summarised in Table I. Table I. Properties of SAGel films