Register File Synthesis in ASIP Design

Interest in synthesis of Application Specific Instruction Set Processors or ASIPshas increased considerably and a number of methodologies have been proposed forASIP design. A key step in ASIP synthesis involves deciding architectural featuresbased on application requirements and constraints. In this report we observe theeffect of changing register file size on the performance as well as power and energyconsumption. Detailed data is generated and analyzed for a number of application...