Special-Purpose Hardware for Factoring: the NFS Sieving Step

In the quest for factorization of larger integers, the present bottleneck is the sieving step of the Number Field Sieve algorithm. Several special-purpose hardware architec- tures have been proposed for this step: TWINKLE (based on electro-optics), mesh circuits (based on two-dimensional systolic arrays) and TWIRL (based on parallel pro- cessing pipelines). For 1024-bit composites, the use of such special-purpose hardware has reduced the predicted cost of factorization by 5-6 orders of magnitude. We review the proposed architectures, their cost, and their various approaches to exploiting the flexibility of custom hardware.