Performance Of Flash Adcs In The 100 Mhz Range .2. Results From 8-Bit Devices

Using a test bench described at this symposium last year, we have performed tests on 8 bit flash ADCs from Sony and Analog Devices. For each device we have measured parameters such as linearity, number of effective bits, noise level, aperture jitter, integral and differential nonlinearity, analog bandwidth, and total harmonic distortion. The goal of these tests is to find cost effective solutions to data acquisition problems in SSC and LHC experiments. Future work will include ten and twelve bit ADCs.