Buffer Design Trade-Offs for Single Electron Logic Gates

Networks of buffered Threshold Logic Gates (TLG) implemented in Single Electron Tunneling technology have previously been demonstrated to operate correctly for a wide range of logic circuits. Given the complexity of the buffered TLG design, the TLG and the buffer are typically designed and optimized separately. In this paper we propose a method to design the TLG and the buffer separately while optimizing the compound design. First, we analyze the impact of the buffer on the TLG switching behavior. Second, we introduce a general buffer design methodology. Third, we presents a set of buffer implementations and demonstrate their impact on an example TLG. Index Terms— Single electron tunneling (SET), single elec- tron logic, buffers, SET networks. I. INTRODUCTION Single Electron Tunneling (SET) (1) based circuits allow for encoding the Boolean logic values '0 'a nd ' 1' as a charge of 0 or 1 electrons (2), realizing Single Electron Encoded Logic (SEEL) circuits. A SEEL Thresh- old Logic Gate (TLG) that can be used as a basis for implementing linear threshold gates with both positive and negative weights, as well as conventional Boolean gates, were proposed earlier in (3). The feedback problems that occur in networks of such TLGs (4) were overcome by augmenting each gate in the network with an output buffer and networks of buffered TLGs were demonstrated to operate correctly for a range of logic circuits (5), (6). Thus far, when designing a buffered TLG the TLG and the buffer were optimized independent of each other in or- der to reduce the complexity of the design process. While this is a pragmatic approach as optimizing the compound design is more difficult due the larger number of circuit parameters one has to consider for this purpose, it cannot take the interaction between the TLG and the buffer into consideration. Thus even though the parts are optimized the compound design might not be. This paper proposes a method to design the TLG and the buffer separately while considering the implications of combining them later into a buffered TLG. First, we analyze the dynamic feedback originating from the buffer and its impact on the switching behavior of the TLG. Second, we proposes a set of buffer implementations suitable for various TLG implementations. Third, we demonstrate the impact of the buffer on the TLG switching behavior through an example. The remainder of the paper is organized as follows. Sec- tion II briefly describes the electron tunneling phenomenon in SET circuits and introduces the SEEL threshold gate and buffer. Section III examines trade-offs in the buffer design and demonstrates the impact of the buffer on the TLG switching behavior. Section IV concludes the paper. II. BACKGROUND SET circuits are centered around tunnel junctions which consist of an ultra-thin insulating layer in a conducting material. In classical physics no charge transport is pos- sible through an insulator. However, when the insulating layer is thin enough the transport or tunneling of charge can be controlled in a discrete and accurate manner, i.e., one electron at a time, if it reduces the amount of energy in the system. Tunneling through a junction becomes possible when the junction's current voltage Vj exceeds the junction's critical voltage Vc = q