A 65 nm CMOS low power RF front-end for L1/E1 GPS/Galileo signals.

In this paper, we present a low-power RF front-end designed for L1/E1 GPS/Galileo, implemented on 65 nm CMOS technology. It draws 16mA on external voltage supply of 1.2V, with power consumption of less than 20mW. The chip could work also at 1.8V using a low dropout regulator embedded in the chip. The device integrates a high performance low noise amplifier, an AGC that don't need any external capacitor and a PLL loop filter reducing the external components count: only few passives for matching and external TCXO for frequency reference are needed. A programmable synthesizer manages most of the commonly used TCXO frequencies. Two default operative modes and related reference frequencies have been defined: 16.368MHz and 26MHz. The IF filter is fully embedded. It is a complex filter characterized from two operative modes: the first for GPS-only signal, the second for both GPS and GALILEO signals. Its characteristics can be adjusted through a proper switching cascade of adaptive first order cells. The data bit for base band are generated by a 3-bits ADC. The whole die area is 2.6mm2