A 20-Gb/s Full-Rate Linear Clock and Data Recovery Circuit With Automatic Frequency Acquisition
IEEE Journal of Solid-State Circuits（2009）
摘要
A 20-Gb/s full-rate clock and data recovery circuit employing a mixer-type linear phase detector and automatic frequency locking technique is described. The phase detector achieves high-speed operation by mixing the clock with the data-transition pulses, providing output proportional to the phase error. The frequency acquisition loop utilizes the data phases rather than the clock phases to distill...
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关键词
Clocks,Circuits,Automatic frequency control,Jitter,Phase detection,CMOS technology,Phase frequency detector,Space vector pulse width modulation,Frequency locked loops,Error analysis
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