A 32mW 7.4Gb/s protocol-agile source-series-terminated transmitter in 45nm CMOS SOI.

Wayne D. Dettloff,John C. Eble,Lei Luo,Pravin Kumar Venkatesan,Fred Heaton,Teva Stone,Barry Daly

ISSCC（2010）

引用 74|浏览47

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摘要

An SST transmitter is described with ground regulation, P-to-N shunting and partially weighted segments for fine granularity level/equalization. Clocks and datapath dissipate 32mW at 7.4Gb/s with an 800mV eye for a power efficiency of 4.32mW/(Gb/s). Measured total jitter is 209.6mUI or 28.3ps at 10-12 BER. Target protocols include PCIe G1/2, XAUI, FC 1/2/4, CEI6 MR and SATA 1/2.

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关键词

CMOS integrated circuits,error statistics,protocols,transmitters,-to-N shunting,45nm CMOS SOI,bit rate 7.4 Gbit/s,power 32 mW,power 4.32 mW,power efficiency,protocol-agile source-series terminated transmitter,voltage 800 mV

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