Fault-Tolerant Router with Built-In Self-Test/Self-Diagnosis and Fault-Isolation Circuits for 2D-Mesh Based Chip Multiprocessor Systems
2009 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION AND TEST (VLSI-DAT), PROCEEDINGS OF TECHNICAL PROGRAM（2009）
Key words
built-in self test,fault tolerance,multiprocessing systems,network-on-chip,2D-mesh,built-in self-diagnosis,built-in self-test,chip multiprocessor systems,fault-isolation circuits,fault-tolerant router,on-chip networks
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