A Halting Algorithm to Determine the Existence of the Decoder

Formal Methods in Computer-Aided Design(2011)

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Abstract
Complementary synthesis automatically synthesizes the decoder circuit of an encoder. It determines the existence of the decoder by checking whether the encoder's input can be uniquely determined by its output. However, this algorithm will not halt if the decoder does not exist. To solve this problem, a novel halting algorithm is proposed. For every path of the encoder, this algorithm first checks whether the encoder's input can be uniquely determined by its output. If yes, the decoder exists; otherwise, this algorithm checks if this path contains loops, which can be further unfolded to prove the non-existence of the decoder for all those longer paths. To illustrate its usefulness and efficiency, this algorithm has been run on several complex encoders, including PCI-E and Ethernet. Experimental results indicate that this algorithm always halts properly by distinguishing correct encoders from incorrect ones, and it is more than three times faster than previous ones.
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Key words
network synthesis,Ethernet,correct encoders,complementary synthesis,halting algorithm,computability,complex encoders,encoder,PCI-E,decoder circuit,decoder circuit synthesis,longer path,decoding,algorithm check,Complementary synthesis
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