Face detection system for SVGA source with hecto-scale frame rate on FPGA board

Microprocessors and Microsystems(2012)

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摘要
This paper proposes techniques for face detection using Haar-like features as weak classifiers and gives the implementation details for an FPGA development board. We analyze and discuss the relation between the system computation cost and selection of the image scaling factor. Based on the empirical results of our previous work, we give a new method to select the stop threshold for the image reduction process, which reduces the total computation by half. We present and implement an improved integral image pipeline calculation design. We also provide a color image output mode to let our system enjoy more human-oriented design. Test results show that the system achieves real-time face detection speed (100fps) and a high face detection rate (87.2%) for an SVGA (600x800) video source. The low power consumption (3.5W) is another advantage over previous work.
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关键词
face detection,detection system,system computation cost,color image output mode,previous work,improved integral image pipeline,calculation design,fpga board,svga source,high face detection rate,human-oriented design,real-time face detection speed,hecto-scale frame rate,image reduction process,field programmable gate array
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