Effects of Cu surface roughness on TDDB for direct polishing ultra-low k dielectric Cu interconnects at 40nm technology node and beyond

The time-dependent dielectric breakdown (TDDB) reliability performance of back-end-of-line (BEOL) structures has been demonstrated to obviously correlate with the surface roughness of Cu metal line. Larger Cu surface roughness could induce the cracking of metal capping layer and the degradation of TDDB. More ultra-low k (ULK) polishing amount and higher de-ionized water (DIW) dilute ratio post-Cu chemical mechanical polishing (Cu-CMP) chemical cleaning process have been developed to reduce Cu surface roughness for better TDDB performance read-out. An optimized post-cleaning process with adjusted brush gap condition has been demonstrated to eliminate microscratch level with the improvements of the yield of Cu wide line serpent open test structures and TDDB performance at 28nm technology node.