Trimaran: an infrastructure for research in instruction-level parallelism
LANGUAGES AND COMPILERS FOR HIGH PERFORMANCE COMPUTING(2005)
Abstract
Trimaran is an integrated compilation and performance monitoring infrastructure. The architecture space that Trimaran covers is characterized by HPL-PD, a parameterized processor architecture supporting novel features such as predication, control and data speculation and compiler controlled management of the memory hierarchy. Trimaran also consists of a full suite of analysis and optimization modules, as well as a graph-based intermediate language. Optimizations and analysis modules can be easily added, deleted or bypassed, thus facilitating compiler optimization research. Similarly, computer architecture research can be conducted by varying the HPL-PD machine via the machine description language HMDES. Trimaran also provides a detailed simulation environment and a flexible performance monitoring environment that automatically tracks the machine as it is varied.
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Key words
flexible performance monitoring environment,hpl-pd machine,compiler optimization research,compiler controlled management,analysis module,instruction-level parallelism,computer architecture research,parameterized processor architecture,architecture space,detailed simulation environment,machine description language hmdes,processor architecture,computer architecture,intermediate language,compiler optimization
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