An Optimal Linear-Time Algorithm for Interprocedural Register Allocation in High Level Synthesis Using SSA Form

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems(2010)

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摘要
An optimal linear-time algorithm for interprocedural register allocation in high level synthesis is presented. Historically, register allocation has been modeled as a graph coloring problem, which is nondeterministic polynomial time-complete in general; however, converting each procedure to static single assignment (SSA) form ensures a chordal interference graph, which can be colored in O(|V|+|E|) time; the interprocedural interference graph (IIG) is not guaranteed to be chordal after this transformation. An extension to SSA form is introduced which ensures that the IIG is chordal, and the conversion process does not increase its chromatic number. The resulting IIG can then be colored in linear-time.
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关键词
circuit complexity,graph colouring,high level synthesis,optimising compilers,chordal interference graph,graph coloring problem,high level synthesis,interprocedural interference graph,interprocedural register allocation,nondeterministic polynomial time,optimal linear-time algorithm,static single assignment,(inteprocedural) register allocation,Chordal graph,graph coloring,high level synthesis,static single assignment (SSA) form
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