Synthesizing Complementary Circuits Automatically

ICCAD '09: The International Conference on Computer-Aided Design San Jose California November, 2009(2010)

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Abstract
One of the most difficult jobs in designing communication and multimedia chips is to design and verify the complex complementary circuit pair (E, E-1), in which circuit E transforms information into a format suitable for transmission and storage, and its complementary circuit E-1 recovers this information. In order to facilitate this job, we proposed a novel two-step approach to synthesize the complementary circuit E-1 from E automatically. First, a SAT solver was used to check whether the input sequence of E can be uniquely determined by its output sequence. Second, the complementary circuit E-1 was built by characterizing its Boolean function, with an efficient all-solution SAT solver based on discovering XOR gates and extracting unsatisfiable cores. To illustrate its usefulness and efficiency, we ran our algorithm on several complex encoders from industrial projects, including PCIE and 10 G Ethernet, and successfully built correct complementary circuits for them.
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Key words
network synthesis,complementary circuit,xor gates,ethernet,communication chips,pcie,circuit e transforms,satisfying assignments enu- meration,synthesis,boolean function,digital circuits,multimedia chips,extracting unsatisfiable core,logic cad,computability,10 g ethernet,all-solution sat,complementary circuit synthesis,sat solver,discovering xor gates,satisfying assignments enumeration,logic gates,boolean functions,chip,satisfiability,cost accounting,iron,design automation,protocols,data mining
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