Bridging DFM Analysis and Volume Diagnostics for Yield Learning - A Case Study
2009 27th IEEE VLSI Test Symposium（2009）
摘要
Volume diagnostics introduces important means for yield learning as conventional techniques become more expensive and insufficient in identifying systematic yield limiters. Integrating DFM practices within the design flows requires faster identification and ranking of systematic yield limiters in the design. This paper presents a paradigm for identifying outliers in the fail signatures obtained from volume fail data using fail rate prediction from chip-level CAA analysis. Results from case study shows that a comparative analysis between predicted and observed fail rates can highlight potential yield limiters.
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关键词
integrating dfm practice,design flow,potential yield limiter,systematic yield limiter,volume diagnostics,case study,chip-level caa analysis,bridging dfm analysis,yield learning,comparative analysis,faster identification,conventional technique,data mining,design for manufacture,system testing,failure analysis,chip,integrated circuit design,layout,application specific integrated circuits,process design,design for manufacturability,silicon,dfm,outliers,systematics,production
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