Dense SiOC cap for damage-less ultra low k integration with direct CMP in C45 architecture and beyond

Microelectronic Engineering(2008)

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Abstract
Deposited on a porous a-SiOC:H intermetal dielectric (IMD), a dense a-SiOC:H cap was successfully integrated in a C45 dual damascene architecture. The paper demonstrates that, stopping the CMP with around 10nm of the cap left, the IMD integrity is preserved. As a consequence, a 3.5% decrease in RC delay, a 7.3% decrease in IMD integrated k-value and an increase of the time to failure by a 100 factor are reached relative to direct CMP. The cap also allowed to achieve straight lines and to improve the lines height uniformity as if CMP stopped on the IMD.
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Key words
a-SiOC:H cap,Porous IMD,Direct CMP,Dual damascene architecture,IMD reliability
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