Aliasing Analysis of Spectral Statistical Response Compaction Techniques

VLSI Design(2006)

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Abstract
We present aliasing models for statistical response compacters (SRCs) for built-in self-testing (BIST) (Khan and Bushnell, 2004). The SRCs are drastically different from the conventional multiple-input signature register (MISR), and use the signal processing Hadamard transform to extract the digital spectral content in output bit streams of circuits and store it in counters. Any deviation of the spectral content from the good machine spectral content indicates a fault. We use the asymmetric error model (AEM) (Xavier et al., 1992) to describe the behavior of a response compacter for a faulty circuit-under-test (CUT). We construct Markov processes for the aliasing models of the response compacters, which have never been studied. The Markov processes iteratively compute exact aliasing probabilities for any test session length and determine the asymptotic probability of aliasing for statistical response compactor 1 (SRC1). Other compacters (SRC2 and SRC5) have too many Markov process states and formulating exact aliasing probability equations is infeasible. So, we present only the asymptotic aliasing probability results, which converge to very low values rapidly. SRC1 does not alias at all on the ISCAS '89 benchmarks, but SRC2 and 5 alias occasionally. The model agrees with previously published simulations (Khan and Bushnell, 2004).
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Key words
exact aliasing probability,markov process state,exact aliasing probability equation,spectral statistical response compaction,aliasing analysis,response compacter,statistical response compacters,statistical response compactor,aliasing model,asymptotic probability,asymptotic aliasing probability result,response compacters,markov process,markov processes,statistical analysis,signal processing
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