A 10-bit 80-MSPS 2.5-V 27.65-mW 0.185-mm2 segmented current steering CMOS DAC

Haider, S.,Banerjee, S.,Ghosh, A.,Ravi sankar Prasad

18TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS: POWER AWARE DESIGN OF VLSI SYSTEMS（2005）

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摘要

This paper presents a 10 bits 80 MSPS 2.5 V digital-to-analog converter (DAC) using 0.25 micrometer double poly four metal CMOS technology for mixed-signal applications. A segmented current steering architecture is used for this DAC. This architecture gives the most optimized results in terms of speed, resolution, area and power. The DAC can operate at a frequency of 80MHz and above. Total power dissipation is 27.6525 mW with 2.5 V power supply. It achieves differential nonlinearity and integral nonlinearity of ±0.55 LSB and ±0.4 LSB. It occupies an area of 0.185 mm2.

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关键词

CMOS analogue integrated circuits,digital-analogue conversion,low-power electronics,mixed analogue-digital integrated circuits,0.25 micron,10 bits,2.5 V,27.65 mW,MOS analog circuits,differential nonlinearity,digital-to-analog converter,double poly four metal CMOS technology,integral nonlinearity,low-power electronics,mixed analog-digital integrated circuits,mixed-signal applications,segmented current steering CMOS DAC,Digital to Analog Conversion,Low Power,MOS Analog Circuits,Mixed Analog -Digital Integrated Circuits

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