Benchmarks for cell synthesis

Cell synthesis is the process of transforming detailed, transistor level specifications and technology information into layout. While cell synthesis has been investigated for several years, only recently has it become practical and pervasive. To accelerate this process and to encourage further refinement, a set of benchmarks was developed for cell synthesis tools. The benchmarks try to balance the objective of universal participation against that of comprehensive testing. They cover the areas of arithmetic, FSM, RAM, and analog design and include detailed descriptions of technology rules. This paper discusses the benchmarks, and how they were received at the 1989 Physical Design Workshop, and how they may be used as a guide to future work in this field.