Yesin Ryu received the M.S. degree from Seoul National University, Seoul, South Korea, in 2008.
In 2008, she joined the Memory Division, Samsung Electronics, Hwaseong, South Korea, where she has been involved in DRAM circuit design. Her research interests include on-die error-correcting code (OD-ECC); system reliability, availability, and serviceability (RAS); DRAM core architecture; and 3-D-DRAM circuit design and technology.