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Bio
Xavier Défago is a professor in the School of Computing, Tokyo Institute of Technology (Tokyo Tech) since 2016. He obtained his master's degree in Computer Science (spec. Computer Engineering) in 1995 at the Swiss Federal Institute of Technology in Lausanne (EPF Lausanne, Switzerland). After graduation, he worked for one year as a research intern at the NEC C&C Central Research Labs in Kawasaki, Japan. He then returned to the EPFL as an assistant and obtained his Ph.D. in Computer Science in 2000, under the guidance of Prof. André Schiper.
The same year, he joined the Graduate School of Knowledge Science at the Japan Advanced Institute of Science and Technology (JAIST) as a research associate, and then moved to the Graduate School of Information Science as a research associate professor (2003) and later as an associate professor (2006).
In parallel, Xavier was a PRESTO researcher for the Japan Science and Technology Agency (JST) from 2002 to 2006. Recently, he was also invited as a CNRS researcher in France, to work both at LIP6, UPMC, Paris, and at I3S, UNS, Inria Sophia Antipolis in 2013.
Xavier has published more than 80 research papers in prestigious journals and conferences which have been cited numerous times. He has served as PC chair for SRDS 2014, ICDCS 2012, and SSS 2011. He is a member of ACM, IEEE, IEEE-CS, EATCS, IPSJ, and a regular member of the IFIP working group 10.4 on dependable computing and fault-tolerance. His research interests include distributed algorithms, fault-tolerance, group communication, and cooperative autonomous mobile robot networks.
The same year, he joined the Graduate School of Knowledge Science at the Japan Advanced Institute of Science and Technology (JAIST) as a research associate, and then moved to the Graduate School of Information Science as a research associate professor (2003) and later as an associate professor (2006).
In parallel, Xavier was a PRESTO researcher for the Japan Science and Technology Agency (JST) from 2002 to 2006. Recently, he was also invited as a CNRS researcher in France, to work both at LIP6, UPMC, Paris, and at I3S, UNS, Inria Sophia Antipolis in 2013.
Xavier has published more than 80 research papers in prestigious journals and conferences which have been cited numerous times. He has served as PC chair for SRDS 2014, ICDCS 2012, and SSS 2011. He is a member of ACM, IEEE, IEEE-CS, EATCS, IPSJ, and a regular member of the IFIP working group 10.4 on dependable computing and fault-tolerance. His research interests include distributed algorithms, fault-tolerance, group communication, and cooperative autonomous mobile robot networks.
Research Interests
Papers共 135 篇Author StatisticsCo-AuthorSimilar Experts
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DSNpp.xv-xvi, (2023)
IJCAI '23 Proceedings of the Thirty-Second International Joint Conference on Artificial Intelligencepp.252-261, (2023)
THEORETICAL COMPUTER SCIENCE (2023): 114198-114198
2023 IEEE 26th International Conference on Intelligent Transportation Systems (ITSC)pp.3597-3604, (2023)
2023 IEEE 26th International Conference on Intelligent Transportation Systems (ITSC)pp.1927-1934, (2023)
2022 IEEE 61ST CONFERENCE ON DECISION AND CONTROL (CDC) (2022): 2387-2392
Xiangyu Su,Xavier Défago,Mario Larangeira, Kazuyuki Mori, Takuya Oda, Yuta Okumura,Yasumasa Tamura,Keisuke Tanaka
IACR Cryptol. ePrint Arch. (2022)
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