Siddharth Chouksey

Siddharth Chouksey (S'07) was born in Betul, India, in 1983. He received the B.Tech. degree in information and communication technology from Dhirubhai Ambani Institute of Information and Communication Technology, Gandhinagar, India, and the M.S. and the Ph.D. degrees in electrical and computer engineering from the University of Florida, Gainesville. His doctoral research was focused on modeling, design, and performance of nonclassical silicon-on-insulator and multigate MOSFETs, for both digital and analog applications. In the summer of 2008 and 2009, he interned in the Components Research Group, Intel Corporation, Hillsboro, OR, where he was actively involved in the design of novel nanoscale floating-body memory cells. He is currently a Process TD Engineer with Intel Corporation, where he is involved in the design of CMOS for the 15-nm node.