Sandeep B. Sane

Sandeep Sane received the B.S. degree from IIT Bombay, Mumbai, India, in 1995, and the M.S. and Ph.D. degrees from Caltech, Pasadena, CA, USA, in 2000. He is currently a Principal Engineer with Assembly and Test Technology Division, Intel. In 2002, he joined Intel, is currently leading package Architecture definitions and packaging technology solutions for Intel products in co-package optics, network switch, programmable solutions, and 5G markets. He has strong expertise in Si-Package-System Architecture definition to drive integrated solutions that optimize Silicon-Package design, Fab and Assembly processes, Reliability, and Cost. He holds more than 20 patents. He is the co-inventor of EMIB/Co-EMIB Technology, which has been implemented across various Intel products. He has authored or coauthored various technical articles in various conferences and journal proceedings including a book chapter. He is Member of ASME, and actively participates in conference organization related to packaging. Prior to Intel, he was with IBM, Endicott, NY at the Micro-Electronics Division as a Development Staff Engineer.