基本信息
views: 24
![](https://originalfileserver.aminer.cn/sys/aminer/icon/show-trajectory.png)
Bio
He is a Candidate for a Doctoral degree in Computer Science, under the advisory of Prof. Aviral Shrivastava, from the School of Computing Informatics and Decision Systems Engineering, ASU.
Reiley graduated from the University of Madras, India with a bachelors degree in engineering in 2004, and joined L&T Infotech, India as a software engineer. He then received his MS degree in Electrical Engineering in 2008. He has been associated with the Compiler Microarchitecture Lab, SCIDSE, ASU, as a Research Associate since Aug 2006.
His primary research focus is in developing compiler-based solutions to improve embedded system reliability through analytical modeling and analysis of the processor microarchitecture. His other areas of interest include: developing compiler solutions to enable the efficient use of CGRAs and such power-efficient many-core architectures; and developing hybrid compiler-architecture solutions to reduce embedded system power consumption.
Research Interests
Papers共 29 篇Author StatisticsCo-AuthorSimilar Experts
By YearBy Citation主题筛选期刊级别筛选合作者筛选合作机构筛选
时间
引用量
主题
期刊级别
合作者
合作机构
ELECTRONICSno. 23 (2021): 3028-3028
Jason Lowe-Power, Abdul Mutaal Ahmad,Ayaz Akram,Mohammad Alian,Rico Amslinger,Matteo Andreozzi,Adrià Armejach,Nils Asmussen,Srikant Bharadwaj, Gabe Black,Gedare Bloom,Bobby R. Bruce,
CoRR (2020)
Cited45Views0EIBibtex
45
0
IEEE Transactions on Very Large Scale Integration Systemsno. 2 (2017): 555
Cited0Views0Bibtex
0
0
Load More
Author Statistics
Co-Author
Co-Institution
D-Core
- 合作者
- 学生
- 导师
Data Disclaimer
The page data are from open Internet sources, cooperative publishers and automatic analysis results through AI technology. We do not make any commitments and guarantees for the validity, accuracy, correctness, reliability, completeness and timeliness of the page data. If you have any questions, please contact us by email: report@aminer.cn