基本信息
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Bio
Rahul Khanna (M’96) received the master’s and P.D. degrees in electrical and computer engineering from Columbia University, New York, NY, USA, and the Ph.D. degree in electrical and computer engineering from Oregon State University, Corvallis, OR, USA.
He is a Principal Engineer (Platform Architect) with Intel Corporation, Hillsboro, OR, USA, involved in the development of energy-efficient algorithms. Over the past 20 years, he has researched on server system software technologies, including platform automation, power/thermal optimization techniques, reliability, low-power sensor networks, and predictive methodologies. He has authored two books, numerous technical papers, and book chapters and holds over 40 patents. He is also the co-inventor of the Intel Interconnect Built-in Self-Test, a methodology for high-speed interconnect testing.
Dr. Khanna was a recipient of three Intel Achievement Awards for his contributions in areas related to the advancement of platform technologies.
Research Interests
Papers共 249 篇Author StatisticsCo-AuthorSimilar Experts
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Manish Kumar,Rahul Khanna, R. N. Meena,Swati S. Mishra,Panchanana Panigrahy,Akshay Anand, Binay Kumar
International Surgery Journalno. 6 (2023): 1140-1142
2023 IEEE/ACM International Workshop on Cloud Intelligence & AIOps (AIOps)pp.14-22, (2023)
IEEE CONFERENCE ON GLOBAL COMMUNICATIONS, GLOBECOMpp.4461-4466, (2023)
Indian Journal of Surgerypp.1-4, (2023)
Cureusno. 11 (2023): e49092-e49092
Mohit Kumar,Rahul Khanna, R. N. Meena, Sudhansu Sekhar Mishra,Panchanana Panigrahy,Akshay Anand, Binod Kumar
International Surgery Journalno. 6 (2023): 1082-1084
2022 21st IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (iTherm)pp.1-9, (2022)
Deepak Bariya,Shashi Prakash Mishra, B R Akshay,Sweety Kumari, Akanksha,Rahul Khanna,Ram Niwas Meena
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Author Statistics
#Papers: 249
#Citation: 4792
H-Index: 33
G-Index: 55
Sociability: 6
Diversity: 1
Activity: 1
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