Rahul Bera - ETH Zürich | 人才画像

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Career Trajectory

Bio

Rahul Bera received the master’s degree in computer science from the Indian Institute of Technology Kanpur, in 2017. He is currently pursuing the Ph.D. degree with ETH Zürich, Switzerland. He has worked with AMD and Intel Labs, India. His research interests include the broad areas of memory hierarchy design and applied machine learning in computer architecture.

Research Interests

Papers共 18 篇Author StatisticsCo-AuthorSimilar Experts

By YearBy Citation主题筛选期刊级别筛选合作者筛选合作机构筛选

CIPHERMATCH: Accelerating Homomorphic Encryption-Based String Matching Via Memory-Efficient Data Packing and In-Flash Processing

Mayank Kabra,Rakesh Nadig, Harshita Gupta,Rahul Bera, Manos Frouzakis, Vamanan Arulchelvan, Yu Liang,Haiyu Mao,Mohammad Sadrosadati,Onur Mutlu

CoRR (2025)

Cited0Views0EIBibtex

Harmonia: A Multi-Agent Reinforcement Learning Approach to Data Placement and Migration in Hybrid Storage Systems

Rakesh Nadig, Vamanan Arulchelvan,Rahul Bera, Taha Shahroodi,Gagandeep Singh, Andreas Kakolyris,Mohammad Sadrosadati,Jisung Park,Onur Mutlu

arxiv（2025）

Cited0Views0Bibtex

Virtuoso: Enabling Fast and Accurate Virtual Memory Research Via an Imitation-based Operating System Simulation Methodology

Konstantinos Kanellopoulos, Konstantinos Sgouras, F. Nisa Bostanci, Andreas Kosmas Kakolyris, Berkin Kerim Konar,Rahul Bera,Mohammad Sadrosadati,Rakesh Kumar,Nandita Vijaykumar,Onur Mutlu

ASPLOS (2)pp.1400-1421, (2025)

Cited0Views0EIBibtex

Virtuoso: an Open-Source, Comprehensive and Modular Simulation Framework for Virtual Memory Research

Konstantinos Kanellopoulos, Konstantinos Sgouras,F. Nisa Bostanci, Andreas Kosmas Kakolyris, Berkin Kerim Konar,Rahul Bera,Mohammad Sadrosadati, Rakesh Kumar,Nandita Vijaykumar,Onur Mutlu

CoRR (2024)

Cited0Views0EIBibtex

Constable: Improving Performance and Power Efficiency by Safely Eliminating Load Instruction Execution

Rahul Bera, Adithya Ranganathan,Joydeep Rakshit, Sujit Mahto,Anant Nori,Jayesh Gaur,Ataberk Olgun,Konstantinos Kanellopoulos,Mohammad Sadrosadati,Sreenivas Subramoney,Onur Mutlu

2024 ACM/IEEE 51ST ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE, ISCA 2024（2024）

Cited0Views0EIWOSBibtex

Victima: Drastically Increasing Address Translation Reach by Leveraging Underutilized Cache Resources

Konstantinos Kanellopoulos, Hong Chul Nam,F. Nisa Bostanci,Rahul Bera,Mohammad Sadrosadati,Rakesh Kumar,Davide Basilio Bartolini,Onur Mutlu

CoRR（2023）

Cited1Views0EIWOSBibtex

Casper: Accelerating Stencil Computations Using Near-Cache Processing

Alain Denzler,Geraldo F. Oliveira,Nastaran Hajinazar,Rahul Bera,Gagandeep Singh,Juan Gomez-Luna,Onur Mutlu

IEEE ACCESS（2023）

Cited12Views0EIWOSBibtex

Hermes: Accelerating Long-Latency Load Requests Via Perceptron-Based Off-Chip Load Prediction

Rahul Beral,Konstantinos Kanellopoulosl,Shankar Balachandran,David Novo,Ataberk Olgunl,Mohammad Sadrosadatil,Onur Mutlul

2022 55TH ANNUAL IEEE/ACM INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE (MICRO)pp.1-18, (2022)

Cited15Views0EIWOSBibtex

Utopia: Fast and Efficient Address Translation Via Hybrid Restrictive Flexible Virtual-to-Physical Address Mappings

Konstantinos Kanellopoulos,Rahul Bera,Kosta Stojiljkovic,Nisa Bostanci,Can Firtina,Rachata Ausavarungnirun,Rakesh Kumar,Nastaran Hajinazar,Mohammad Sadrosadati,Nandita Vijaykumar,Onur Mutlu

Micro (2022)

Cited2Views0EIWOSBibtex

Sibyl: Adaptive and Extensible Data Placement in Hybrid Storage Systems Using Online Reinforcement Learning

Gagandeep Singh,Rakesh Nadig,Jisung Park,Rahul Bera,Nastaran Hajinazar,David Novo,Juan Gomez-Luna,Sander Stuijk,Henk Corporaal,Onur Mutlu

CoRR（2022）

Cited22Views0EIBibtex

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