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Bio
Jose Nunez-Yanez is a Professor in Professor in Adaptive and Energy Efficient Hardware for ML at Linköping University (Sweden). Prior to that he was a Reader (associate professor) in adaptive and energy efficient computing at the University of Bristol and member of the microelectronics group. He holds a PhD in hardware-based parallel data compression from the University of Loughborough, UK, with three patents awarded on the topic of high-speed parallel data compression. His main area of expertise is in the design of reconfigurable architectures for signal processing with a focus on run-time adaptation, parallelism and energy-efficiency. In 2006-2007 he was a Marie Curie research fellow at ST Microelectronics, Milan, Italy working on the automatic design of accelerators for video processing. In 2011 he was a Royal Society research fellow at ARM Ltd, Cambridge, UK working on high-level modelling of the energy consumption in heterogeneous many-core systems.
Research Interests
Papers共 168 篇Author StatisticsCo-AuthorSimilar Experts
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2024 13th Mediterranean Conference on Embedded Computing (MECO)pp.1-7, (2024)
2024 IEEE 17th Dallas Circuits and Systems Conference (DCAS)pp.1-6, (2024)
International Symposium on Applied Reconfigurable Computing. Architectures, Tools, and Applicationspp.33-47, (2024)
IWOCL '24 Proceedings of the 12th International Workshop on OpenCL and SYCLpp.1-11, (2024)
Sensorsno. 11 (2024): 3660
APPLIED RECONFIGURABLE COMPUTING. ARCHITECTURES, TOOLS, AND APPLICATIONS, ARC 2023 (2023): 131-145
APPLIED RECONFIGURABLE COMPUTING. ARCHITECTURES, TOOLS, AND APPLICATIONS, ARC 2023 (2023): 260-274
CoRR (2023): 9:1-9:14
2022 25th Euromicro Conference on Digital System Design (DSD)pp.101-108, (2022)
2022 International Workshop on Integrated Nonlinear Microwave and Millimetre-Wave Circuits (INMMiC)pp.1-3, (2022)
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