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排名必读论文期刊顶会热点AI 简史溯源树小脉星探人才迁徙塔尖人才国防情报追踪开源工具智慧手语
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论文共 17 篇作者统计合作学者相似作者

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Layout Electrical Cooptimization For Increased Tolerance To Process Variations
Lionel Riviere-Cazaux,Philippe Hurat,Bala Kasthuri, Larry Layton,Nishath Verghese
DESIGN FOR MANUFACTURABILITY THROUGH DESIGN-PROCESS INTEGRATION III (2009)
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Variations In Timing And Leakage Power Of 45nm Library Cells Due To Lithography And Stress Effects
Kayvan Sadra,Mark Terry,Arjun Rajagopal, Robert A. Soper,Donald Kolarik, Tom Aton, Brian Hornung,Rajesh Khamankar,Philippe Hurat,Bala Kasthuri,Yajun Ran,Nishath Verghese
DESIGN FOR MANUFACTURABILITY THROUGH DESIGN-PROCESS INTEGRATION III (2009)
引用4浏览0引用
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Context Analysis And Validation Of Lithography Induced Systematic Variations In 65nm Designs
Arjun Rajagopal, Anand Rajaram,Raguram Damodaran, Frank Cano, Srinivas Swaminathan,Clive Bittlestone, Mark Terry, Mark Mason,Yajun Ran, Haizhou Chen, Robert Ritchie,Bala Kasthuri,
DESIGN FOR MANUFACTURABILITY THROUGH DESIGN-PROCESS INTEGRATION II (2008): 77-84
引用4浏览0引用
4
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Microprocessor Chip Timing Analysis Using Extraction Of Simulated Silicon-Calibrated Contours
Toshiaki Yanagihara, Takeshi Hamamoto, Koya Sato, Atsushi Okamura, Tshiyuki Maitsunaga, Naohiro Kobayashi, Tatsuya Maekawa,Nishath Verghese,Jac Condella,Philippe Hurat
DESIGN FOR MANUFACTURABILITY THROUGH DESIGN-PROCESS INTEGRATION II (2008)
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Implementation Of Silicon-Validated Variability Analysis And Optimization Tor Standard Cell Libraries
Raphael Bingert, Alain Aurand, Jean-Claude Marin, Eric Balossier,Thierry Devoivre,Yorick Trouiller,Florent Vautrin,Nishath Verghese,Richard Rouse,Michel Cote,Philippe Hurat
DESIGN FOR MANUFACTURABILITY THROUGH DESIGN-PROCESS INTEGRATION II (2008): 181-192
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