Marcelo Antonio Pavanello (Senior Member, IEEE) received the electrical engineering degree from FEI University in 1993, and the M.Sc. and Ph.D. degrees in electrical engineering (microelectronics) from the University of São Paulo, Brazil, in 1996 and 2000, respectively. From August to December 1998, he was with the Laboratoire de Microélectronique, Université Catholique de Louvain (UCL), Belgium, working in the fabrication and electrical characterization of novel channel-engineered silicon-on-insulator (SOI) transistors. From 2000 to 2002, he was with the Center of Semiconductor Components and Nanotechnologies, State University of Campinas, Brazil, where he worked as a Postdoctoral Researcher with the development of a CMOS n-well process. In 2003, he joined FEI University, where he is currently a Full Professor with the Electrical Engineering Department. Since 2008, he has been with UCL as a Visiting Professor. From 2010 to 2020, he also served as the Vice-Rector for Teaching and Research with FEI. He has authored or coauthored more than 400 technical papers in peer-reviewed journals and conferences, and is an author/editor of six books. He coordinates several research projects fomented by Brazilian agencies like FAPESP, CNPq, and Capes. He also supervised several Ph.D. dissertations, M.Sc. thesis, and undergraduate projects in electrical engineering. His current interests are the compact modeling, fabrication, electrical characterization, and simulation of SOI CMOS transistors with multiple gate configurations and silicon nanowires; the wide temperature range of operation of semiconductor devices; and the digital and analog operation of novel channel-engineered SOI devices and circuits. Prof. Pavanello received the Award “Instituto de Engenharia” given for the best student among all the modalities of engineering programs offered at FEI. He is also a Researcher associated to the National Council for Scientific Development (CNPq), Brazil. Since 2007, he has been serving as an IEEE Electron Devices Society (EDS) Distinguished Lecturer and has been nominated to the Compact Modeling Technical Committee of EDS in 2018. Since 2019, he has been assigned as an Editor for Process and Device Modeling of IEEE Transactions on Electron Devices. He is a Senior Member of the Brazilian Microelectronics Society.