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In 1981, he joined the Central Research Laboratory, Hitachi, Ltd., Tokyo, where he has been engaged in research and development on design and characterization of Si bipolar/BiCMOS process technologies, devices, and circuits for both mixed analog/digital LSIs and high-speed LSIs. Since 1985, he has been responsible as a Leader of more than 10 research themes and projects. Since 1994, he has been a Researching Group Leader, and researched on high-speed Si BiCMOS process, device, and circuit technologies for the fast-cache memory LSIs of large-size computing machine and for the IC chipset of 10-Gb/s optical-fiber links. He has been responsible for high-speed SiGe HBT/BiCMOS process, device, and circuit technologies for optical-fiber links and microwave/millimeter-wave communication systems, and was also responsible for strained-Si MOS technology, as a Chief Senior Researcher in the ULSI Research Department. From 1992 to 1993, he was a Visiting Researcher at the Corporate Research and Development, Siemens AG, Munich, Germany. He has served on the Technical Program Committees of the Bipolar/BiCMOS Circuits and Technology Meeting since 1998, the International Electron Devices Meeting in 2000 and 2001, and the Subcommittee Chair of IEDM in 2002. He is currently a Professor in the Graduate School of Engineering, Tohoku University, Sendai, Japan
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